A wide variety of off-line LED drivers are known. For example, a capacitive drop off-line LED driver from On Semiconductor (Application Note AND8146/D) is a non-isolated driver with low efficiency, is limited to delivering relatively low power, and at most can deliver a constant current to the LED with no temperature compensation, no dimming arrangements, and no voltage or current protection for the LED.
Other isolated off-line LED drivers also have wide-ranging characteristics, such as a line frequency transformer and current regulator (On Semiconductor Application Note AND 8137/D); a current mode controller (On Semiconductor Application Note AND8136/D); a white LED luminary light control system (U.S. Pat. No. 6,441,558); LED driving circuitry with light intensity feedback to control output light intensity of an LED (U.S. Pat. No. 6,153,985); a non-linear light-emitting load current control (U.S. Pat. No. 6,400,102); a flyback as an LED Driver (U.S. Pat. No. 6,304,464); a power supply for an LED (U.S. Pat. No. 6,557,512); a voltage booster for enabling the power factor controller of a LED lamp upon a low AC or DC supply (U.S. Pat. No. 6,091,614).
In general, these various LED drivers are overly-complicated, such as using secondary side signals (feedback loops) which have to be coupled with the controller primary side across the isolation provided by one or more transformers. Many utilize a current mode regulator with a ramp compensation of a pulse width modulation (“PWM”) circuit. Such current mode regulators require relatively many functional circuits, and nonetheless continuing to exhibit stability problems when used in the continuous current mode with a duty cycle or ratio over fifty percent. Various prior art attempts to solve these problems utilized a constant off time boost converter or hysteric pulse train booster. While these prior art solutions addressed problems of instability, these hysteretic pulse train converters exhibit other difficulties, such as electromagnetic interference, inability to meet other electromagnetic compatibility requirements, and are comparatively inefficient. Other attempts, such as in U.S. Pat. Nos. 6,515,434 B1 and 6,747,420, provide solutions outside the original power converter stages, adding additional feedback and other circuits, which render the LED driver even larger and more complicated.
Widespread proliferation of solid state lighting systems (semiconductor, LED-based lighting sources) created a demand for highly efficient power converters, LED Drivers, with high conversion ratios of input to output voltages. In order to reduce the component count, such converters may be constructed without isolation transformers, and instead using two-stage converters with the second stage running at a very low duty cycle, thereby limiting the maximum operating frequency, resulting in an increase in the size of the converter (due to the comparatively low operating frequency), and ultimately defeating the purpose of removing coupling transformers.
Various proposals to solve these problems have included use of quadratic power converters for providing a low output voltage with a wide DC conversion range, such as the quadratic power converter 10 illustrated in FIG. 1. For example, in “Switching Converter with Wide DC Conversion Range” (D. Maksimovic and S. Guk, May 1989 HFPC Proceedings and also in IEEE Transactions on Power Electronics, Vol. 6, No. 1, January 1991), the authors suggested using PWM converters having a single switch and featuring voltage conversion ratios with a quadratic dependence of the duty cycle. The cascaded buck and buck-boost topologies were designed and analytically synthesized for controlling the output voltage. When these circuits are used as a current source, however, they become as inadequate as conventional one-stage converters, and exhibit even more problems when used with a sinusoidal input current. For example, these circuits require a large capacitive filter following the rectified AC signal, to continuously provide a DC output, thereby making power factor correction (“PFC”) practically impossible.
Referring to FIG. 1, the input DC voltage Vg (11) is applied to the first stage (buck-boost converter), consisting of transistor 20 (controlled by some type of controller 21), first inductor 15, capacitor 16 and diode 12. When the transistor 20 is conducting, for a linear (non-saturating) inductor 15, current is building substantially linearly in the inductor 15, while diode 12 is blocked by the reverse voltage during this portion of the cycle. When the transistor 20 is off, energy stored in the inductor 15 discharges into capacitor 16, diode 12 is forward biased and conducting during part of the off time (discontinuous mode of operation, “DCM”) or completely during the off time (continuous mode of operation, “CCM”), and the on-off cycle is repeated. The secondary stage is illustrated as a buck converter and consists of the transistor 20, capacitor 18, second inductor 14, and diodes 13 and 17, with the load (illustrated as resistor 19) connected across capacitor 18. When the transistor 20 is conducting, energy from capacitor 16 is being transferred to the load and output capacitor 18 via inductor 14, also charging it linearly, while diode 13 is conducting and diode 12 is blocked. When the transistor 20 is off and not conducting, diode 13 is reverse biased, and diode 17 is conducting, discharging inductor 14 into output capacitor 18. The operational process of buck converter also may be either DCM or CCM. The transfer ratio of the converter 10 is
      -                  D        2                    1        -        D              ,where D is duty cycle, with the minus sign denoting that the polarity of the output voltage is reversed compared to the input voltage. Also, currents in transistor 20 and the output load are flowing in opposite direction, creating a difficult topology for sensing operational signals and providing corresponding feedback signals (e.g., both nodes “A” and “B” are at return potentials).
This prior art quadratic converter is designed to work as a voltage converter with a wide conversion ratio. Were this converter 10 to be used for current control in the output load, however, various issues may arise, such as due to any imbalance of charges, voltages across capacitors 16 and 18 may not match, creating an excessive voltage across capacitor 16, which leads either to an overdesign of the power stage or low reliability must be tolerated, because this converter 10 cannot work if the voltage across capacitor 16 is greater than Vg. For the same reason, this converter 10 cannot be used in the AC/DC topologies requiring power factor correction.
Another proposed solution in U.S. Pat. No. 6,781,351, illustrated in FIG. 2, addressed the PFC problem, providing AC/DC cascaded power converters having high DC conversion ratios and improved AC line harmonics, with low input harmonic currents, a comparatively high power factor, and efficient operation for low voltage DC outputs. These converters, however, like the quadratic converters, have floating operational signals, which are referenced to different nodes of the power stage. Such floating operational signals make the provision of feedback signals to a controller extremely difficult, effectively requiring custom, application-specific controllers for power management.
The input 31 is an AC voltage, rectified by a bridge 32 and further filtered by a small capacitor 33. The buck-boost first stage 44 includes a blocking diode 34, which allows normal operation of the buck boost 44 at any value of input voltage (at node 45), thereby creating an opportunity to provide power factor correction if the on-time of the switch 40 is relatively constant. The second stage, a buck converter, consists of capacitor 42, inductor 39 and diodes 38 and 41, and works substantially the same as the buck converter discussed with reference to FIG. 1. In order to prevent an uncontrollable rise of the voltage across the first stage capacitor 36, the converter uses additional components, a coupled inductor and an additional diode (not illustrated), which negatively affects the economics of the converter 30. A more sophisticated control technique than PWM, also described in the patent, may address the imbalance of the capacitors' charge and prevent a high voltage at the first capacitor stage, without adding additional components to the power stage. Though the prior art converter 30 is improved compared to the prior art converter 10 because it can operate off line using an AC input, it still has floating operational signals, requiring excessively complicated feedback connections to the PWM controller 46.
Accordingly, a need remains to provide a high conversion ratio converter to generate a controlled output current with input and output operational signals, referenced to the same node, such as ground, to provide a capability for improved feedback signals to a controller. Such a converter should be optimized to run using DC input voltages, as well as AC, using a systematized design procedure. In addition, such a converter should provide significant power factor correction when connected to an AC line for input power. Also, it would be desirable to provide a LED driver controller for such a converter, included within a system for controlling a cascaded switching power converter, constructed and arranged for supplying power to one or plurality of LEDs, including for high brightness applications, providing an overall reduction in the size and cost of the LED driver.